Journal article

• ジャーナル論文 Enhanced path smoothing based on conjugate gradient descent for firefighting robots in petrochemical complexestics • Naoki Mizuno, Kazunori Ohno, Ryunosuke Hamada, Hiroyoshi Kojima, Jun Fujita, Hisanori Amano, Thomas Westfechtel, Takahiro Suzuki & Satoshi Tadokoro, Enhanced path smoothing based on conjugate gradient descent for firefighting robots in petrochemical complexes, Advanced Robotics, Volume 33, Issue 14, pp.687-698, DOI: 10.1080/01691864.2019.1632221, Jun. 2019
• ジャーナル論文 Canine Motion Control using Bright Spotlight Devices Mounted on a Suit Hiroyuki Nishinoma, Kazunori Ohno, Takefumi Kikusui, Miho Nagasawa, Naoko Tsuchihashi, Shohei Matsushita, Tomoha Mikayama, Sakiko Tomori, Maaya Saito, Mikuru Murayama, Satoshi Tadokoro, Canine Motion Control using Bright Spotlight Devices Mounted on a Suit, IEEE Transactions on Medical Robotics and Bionics, Vol. 1, No. 3, pp.189-198, DOI: 10.1109/TMRB.2019.2930343, Jul. 2019
• ジャーナル論文 An image recognition system aimed at search activities using cyber search and rescue dogs Solvi Arnold, Kazunori Ohno, Ryunosuke Hamada, Kimitoshi Yamazaki, An image recognition system aimed at search activities using cyber search and rescue dogs, Journal of Field Robotics, Vol.36, Issue 4, pp.677-695, DOI: 10.1002/rob.21848, Jun. 2019
• ジャーナル論文 A Mechanical Approach to Suppress the Oscillation of a Long Continuum Robot Flying With Water Jets Tomoka Yamaguchi , Yuichi Ambe , Hisato Ando , Masashi Konyo , Kenjiro Tadakuma , Shigenao Maruyama, and Satoshi Tadokoro, A Mechanical Approach to Suppress the Oscillation of a Long Continuum Robot Flying With Water Jets, IEEE ROBOTICS AND AUTOMATION LETTERS, VOL.4, NO.4, pp.4346-4353, OCTOBER 2019
• ジャーナル論文 Haptic Exploration during Fast Video Playback: Vibrotactile Support for Event Search in Robot Operation Videos Daniel Marcell Gongora Flores, Masashi Konyo, Hikaru Nagano, Satoshi Tadokoro, Haptic Exploration during Fast Video Playback: Vibrotactile Support for Event Search in Robot Operation Videos, IEEE Transactions on Haptics, DOI: 10.1109/TOH.2019.2957792, December 2019
• ジャーナル論文 The World Robot Summit Disaster Robotics Category - Achievements of the 2018 Preliminary Competition

  Satoshi Tadokoro, Tetsuya Kimura, Masayuki Okugawa, Katsuji Oogane, Hiroki Igarashi, Yoshikazu Ohtsubo, Noritaka Sato, Masaru Shimizu, Soichiro Suzuki, Tomoichi Takahashi, Shin'ichiro Nakaoka, Mika Murata, Mitsuru Takahashi, Yumi Morita and Elena Mary Rooney, The World Robot Summit Disaster Robotics Category - Achievements of the 2018 Preliminary Competition, Advanced Robotics, Vol. 33, Issue 17, pp. 854-875, DOI: 10.1080/01691864.2019.1627244, Jun. 2019.
• ジャーナル論文 Design of a Cost-Efficient Controller for Realizing a Data-Shift-Minimized Nonvolatile Field-Programmable Gate Array　（2019_J_1）

  Daisuke Suzuki and Takahiro Hanyu, Design of a Cost-Efficient Controller for Realizing a Data-Shift-Minimized Nonvolatile Field-Programmable Gate Array, Japanese Journal of Applied Physics (JJAP), vol. 59, no. SG, pp. SGGB13-1~SGGB13-7, DOI:10.35848/1347-4065/ab70ac, 2020.
• ジャーナル論文 Fast hardware-based learning algorithm for binarized perceptrons using CMOS invertible logic (2019_J_2)

  Naoya Onizawa, Duckgyu Shin, and Takahiro Hanyu, Fast hardware-based learning algorithm for binarized perceptrons using CMOS invertible logic, Journal of Applied Logic, Vol. 6, No. 7, pp. 41-58, DOI:***, 2019．
• ジャーナル論文 Design of an MTJ-based nonvolatile multi-context ternary content-addressable memory (2019_J_3)

  Naoya Onizawa, Ren Arakawa, and Takahiro Hanyu, Design of an MTJ-based nonvolatile multi-context ternary content-addressable memory, Journal of Applied Logic, Vol. 6, No. 7, pp. 89-105, DOI: ***, 2019.
• ジャーナル論文 A 47.14μW 200MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications (2019_J_4)

  Masanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, and Takahiro Hanyu, A 47.14μW 200MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications, IEEE Journal of Solid State Circuits (JSSC), Vol. 54, No. 11, pp. 2991-3004, DOI: 10.1109/JSSC.2019.2930910 , 2019.
• ジャーナル論文 A Design Framework for Invertible Logic　（2020_J_2）

  Naoya Onizawa, Kaito Nishino, Sean C. Smithson, Brett H. Meyer, Warren J. Gross, Hitoshi Yamagata, Hiroyuki Fujita, and Takahiro Hanyu, A Design Framework for Invertible Logic, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp.1-1, DOI: 10.1109/TCAD.2020.3003906, 2020.
• ジャーナル論文 In-Hardware Training Chip Based on CMOS Invertible Logic for Machine Learning　（2020_J_3）

  Naoya Onizawa, Sean C. Smithson, Warren Gross, Brett Meyer, and Takahiro Hanyu, In-Hardware Training Chip Based on CMOS Invertible Logic for Machine Learning, IEEE Trans. Circuits and Systems I, vol. 67, no. 5, pp.1541-1550, DOI: 10.1109/TCSI.2019.2960383, 2020.
• ジャーナル論文 Impact of MTJ-Based Nonvolatile Circuit Techniques for Energy-Efficient Binary Neural Network Hardware　（2020_J_4）

  Masanori Natsui, Tomoki Chiba, and Takahiro Hanyu, Impact of MTJ-Based Nonvolatile Circuit Techniques for Energy-Efficient Binary Neural Network Hardware, Japanese Journal of Applied Physics (JJAP), STAP article, vol.59, pp.050602-1~7, DOI: 10.35848/1347-4065/ab82ae, 2020.
• ジャーナル論文 High-Throughput/Low-Energy MTJ-Based True Random Number Generator Using a Multi-Voltage/Current Converter　（2020_J_1）

  Naoya Onizawa, Shogo Mukaida, Akira Tamakoshi, Hitoshi Yamagata, Hiroyuki Fujita, and Takahiro Hanyu, High-Throughput/Low-Energy MTJ-Based True Random Number Generator Using a Multi-Voltage/Current Converter, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 28, Issue 10, pp. 2171-2181, DOI: 10.1109/TVLSI.2020.3005413, 2020.
• ジャーナル論文 An agent‑based model for community formation process of vampire bats that survive by sharing food

  Taishi Mikami, Takeshi Kano, Akio Ishiguro, Artificial Life and Robotics, 25 (2020), doi: 10.1007/s10015-020-00649-9

International Conference Paper

• 国際会議論文 Development of Quadruped Robot That Can Exploit Shoulder Hammock Structure A. Fukuhara, Y. Masuda, M. Gunji, K. Tadakuma and A. Ishiguro, "Development of Quadruped Robot That Can Exploit Shoulder Hammock Structure," 2020 IEEE/SICE International Symposium on System Integration (SII), Honolulu, HI, USA, 2020, pp. 1139-1143, doi: 10.1109/SII46433.2020.9026169.
• 国際会議論文 A Bio–inspired Quadruped Robot Exploiting Flexible Shoulder for Stable and Efficient Walking

  A. Fukuhara, M. Gunji, Y. Masuda, K. Tadakuma, and A. Ishiguro, “Bio-inspired Quadruped Robot Exploiting Flexible Shoulder for Stable and Efficient Walking. ’’ IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2020, accepted.
• 国際会議論文 Design of a Magnetic-Tunnel-Junction-Based Nonvolatile Flip-Flop with Common-Mode Write Error Detection (2020_C_1)

  Gensei Yamagishi, Masanori Natsui and Takahiro Hanyu, Design of a Magnetic-Tunnel-Junction-Based Nonvolatile Flip-Flop with Common-Mode Write Error Detection, Extended Abstract of 2020 International Conference on Solid State Devices and Materials (SSDM 2020), pp.87-88, DOI:*** , 2020.
• 国際会議論文 Design of an Energy-Efficient True Random Number Generator Based on Triple Read-Write Data-Stream Multiplexing of MTJ Devices　（2020_C_1）

  Akira Tamakoshi, Naoya Onizawa, Hitoshi Yamagata, Hiroyuki Fujita, and Takahiro Hanyu, Design of an Energy-Efficient True Random Number Generator Based on Triple Read-Write Data-Stream Multiplexing of MTJ Devices, Proc. 18th IEEE International New Circuits and Systems Conference (NEWCAS), pp.283-286, DOI:*** , 2020.
• 国際会議論文 Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage　（2020_C_5）

  Masanori Natsui, Akira Tamakoshi, Hiroaki Honjo, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Hirofumi Inoue,　Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Yitao Ma, Huicong Shen, Shunsuke Fukami, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, and Takahiro Hanyu,
  Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage, 2020 Symposium on VLSI Circuits, Digest of Technical Papers, 2 pages, DOI: 10.1109/VLSICircuits18222.2020.9162774, 2020.
• 国際会議論文 First demonstration of field-free SOT-MRAM with 0.35 ns write speed and 70 thermal stability under 400°C thermal tolerance by canted SOT structure and its advanced patterning/SOT channel technology (2019_C_1)

  Hiroaki Honjo, Thi Van Anh Nguyen, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Sadahiko Miura, Hirofumi Inoue, Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Akira Tamakoshi, Masanori Natsui, Yitao Ma, Hiroki Koike, Yu Takahashi, Kaito Furuya, Huicong Shen, Shunsuke Fukami, Hideo Sato, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, First demonstration of field-free SOT-MRAM with 0.35 ns write speed and 70 thermal stability under 400°C thermal tolerance by canted SOT structure and its advanced patterning/SOT channel technology, iedm 2019, DOI: 10.1109/IEDM19573.2019.8993443 , 2019.
• 国際会議論文 Stochastic-Computing Based Brainwave LSI Towards an Intelligence Edge (2019_C_2)

  Naoya Onizawa, Warren J. Gross, and Takahiro Hanyu, Stochastic-Computing Based Brainwave LSI Towards an Intelligence Edge, Proceeding of the 26th IEEE International Conference on Electronics Circuits and Systems (ICECS), 4 pages, DOI: 10.1109/ICECS46596.2019.8964739, 2019.
• 国際会議論文 FPGA Implementation of Binarized Perceptron Learning Hardware Using CMOS Invertible Logic (2019_C_3)

  Duckgyu Shin, Naoya Onizawa, and Takahiro Hanyu, FPGA Implementation of Binarized Perceptron Learning Hardware Using CMOS Invertible Logic, 26th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2 pages, DOI: 10.1109/ICECS46596.2019.8965097, 2019.
• 国際会議論文 Multi-Context TCAM Based Selective Computing Architecture for a Low-Power NN (2019_C_4)

  Ren Arakawa, Naoya Onizawa, Jean-Philippe Diguet, and Takahiro Hanyu, Multi-Context TCAM Based Selective Computing Architecture for a Low-Power NN, 26th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2 pages, DOI: 10.1109/ICECS46596.2019.8964869, 2019.
• 国際会議論文 A Design Framework for Invertible Logic　（2019_C_5）

  Naoya Onizawa, Kaito Nishino, Sean C. Smithson, Brett Meyer, Warren J. Gross, Hitoshi Yamagata, Hiroyuki Fujita, and Takahiro Hanyu, A Design Framework for Invertible Logic, Proc. of the 53rd Asilomar Conference on Signals, Systems and Computers, 4 pages, DOI: ***, 2019.
• 国際会議論文 MTJ-Based Nonvolatile Logic-in-Memory Circuit with Feedback-Type Equal-Resistance Sensing Mechanism for Ternary Neural Network Hardware (2019_C_6)

  Masanori Natsui and Takahiro Hanyu, MTJ-Based Nonvolatile Logic-in-Memory Circuit with Feedback-Type Equal-Resistance Sensing Mechanism for Ternary Neural Network Hardware, IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, 2 pages, DOI: ***, 2019.
• 国際会議論文 Design of an Energy-Efficient Controller for Realizing a Data-Shift-Minimized Nonvolatile FPGA (2019_C_7)

  Daisuke Suzuki and Takahiro Hanyu, Design of an Energy-Efficient Controller for Realizing a Data-Shift-Minimized Nonvolatile FPGA, Extended Abstracts of 2019 International Conference on Solid State Devices and Materials (SSDM2019), pp. 525-526, DOI: ***, 2019.
• 国際会議論文 Design of an MTJ-Based Fully-Nonvolatile Microcontroller LSI and Its Impact on IoT Applications (2019_C_8)

  Masanori Natsui and Takahiro Hanyu, Design of an MTJ-Based Fully-Nonvolatile Microcontroller LSI and Its Impact on IoT Applications, 28th International Workshop on Post-Binary ULSI Systems, p.22, DOI: ***, 2019.
• 国際会議論文 Design of a Current-Mode Linear-Sum-Based Bitcounting Circuit with an MTJ-Based Compensator for Binarized Neural Networks (2019_C_9)

  Tomoki Chiba, Masanori Natsui, and Takahiro Hanyu, Design of a Current-Mode Linear-Sum-Based Bitcounting Circuit with an MTJ-Based Compensator for Binarized Neural Networks, Proceedings of the 49th International Symposium on Multiple-Valued Logic (ISMVL), pp. 91-96, DOI: 10.1109/ISMVL.2019.00024, 2019.
• 国際会議論文 Stochastic Computing for Brainware LSI (2019_C_10)

  Naoya Onizawa, Warren J. Gross, and T. Hanyu, Stochastic Computing for Brainware LSI, special session in ASYNC2019, pp.***-***, DOI: ***, 2019.
• 国際会議論文 Impact of a nonvolatile multiple-valued circuit technique for energy-efficient binarized neural-network hardware (2020_I_1)

  Takahiro Hanyu, Impact of a nonvolatile multiple-valued circuit technique for energy-efficient binarized neural-network hardware, ENGE 2020(The 6th International Conference on Electronnic Materials and Nanotechnology for Green Environment), Ramada Plaza Jeju Hotel, Korea, DOI:***, 2020. [Invited]
• 国際会議論文 Nonvolatile Logic LSI Design Technology and Its Application to AI Hardware (2019_I_1)

  Masanori Natsui, Nonvolatile Logic LSI Design Technology and Its Application to AI Hardware, 2019 International Conference on Solid State Devices and Materials (SSDM2019), Short Courses, DOI: ***, 2019. [Invited]
• 国際会議論文 Design of an Energy-Efficient Binarized Convolutional Neural Network Acceler-ator Using a Nonvolatile FPGA with Only-Once-Write Shifting　（2020_C_2）

  Daisuke Suzuki, Takahiro Oka, and Takahiro Hanyu, Design of an Energy-Efficient Binarized Convolutional Neural Network Acceler-ator Using a Nonvolatile FPGA with Only-Once-Write Shifting, Extended Abstract of 2020 International Conference on Solid State Devices and Materials (SSDM 2020), pp.91-92, DOI:*** , 2020.
• 国際会議論文 Systematic Design Flow for Realizing MTJ-Based Nonvolatile FPGAs　（2020_C_3）

  Yasuhiro Takako, Daisuke Suzuki, Masanori Natsui and Takahiro Hanyu, Systematic Design Flow for Realizing MTJ-Based Nonvolatile FPGAs, Extended Abstract of 2020 International Conference on Solid State Devices and Materials (SSDM 2020), pp.93-94, DOI:*** , 2020.

Others （Books, etc.）